159
click to vote
ASPDAC
2008
ACM
15 years 9 months ago
2008
ACM
In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
ASPDAC
2008
ACM
15 years 9 months ago
2008
ACM
187
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GLVLSI
2010
IEEE
15 years 9 months ago
2010
IEEE
For timing-driven or yield-driven designs, non-tree routing has become more and more popular and additional loops provide the redundant paths to protect against the effect of the ...
182
click to vote
ASPDAC
2008
ACM
15 years 9 months ago
2008
ACM
At system level, the on-chip temperature depends both on power density and the thermal coupling with the neighboring regions. The problem of finding the right set of input power pr...