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ASPDAC
2008
ACM
76views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Block remap with turnoff: A variation-tolerant cache design technique
Mohammed Abid Hussain, Madhu Mutyam
ASPDAC
2008
ACM
91views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Heuristic power/ground network and floorplan co-design method
It's a trend to consider power supply integrity at early stage to improve the design quality. In this paper, we propose a novel algorithm to optimize floorplan together with P...
Xiaoyi Wang, Jin Shi, Yici Cai, Xianlong Hong
GECCO
2010
Springer
135views Optimization» more  GECCO 2010»
15 years 9 months ago
Investigating the impact of sequential selection in the (1, 2)-CMA-ES on the noisy BBOB-2010 testbed
Sequential selection was introduced for Evolution Strategies (ESs) with the aim of accelerating their convergence— performing the evaluations of the different offspring sequen...
Anne Auger, Dimo Brockhoff, Nikolaus Hansen
ASPDAC
2008
ACM
98views Hardware» more  ASPDAC 2008»
15 years 9 months ago
A unified methodology for power supply noise reduction in modern microarchitecture design
In this paper, we present a novel design methodology to combat the ever-aggravating high frequency power supply noise (di/dt) in modern microprocessors. Our methodology integrates ...
Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Le...
ASPDAC
2008
ACM
77views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Soft error rate reduction using redundancy addition and removal
Kai-Chiang Wu, Diana Marculescu