Sciweavers

ISSS
1995
IEEE
87views Hardware» more  ISSS 1995»
15 years 8 months ago
Industrial experience using rule-driven retargetable code generation for multimedia applications
The increasing usage of Application Specific Instruction Set Processors (ASIPs) in audio and video telecommunications has made strong demands on the rapid availability of dedicat...
Clifford Liem, Pierre G. Paulin, Marco Cornero, Ah...
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
15 years 8 months ago
Power analysis and low-power scheduling techniques for embedded DSP software
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, M...
ISSS
1995
IEEE
66views Hardware» more  ISSS 1995»
15 years 8 months ago
System level verification of video and image processing specifications
H. Samsom, Frank H. M. Franssen, Francky Catthoor,...
ISSS
1995
IEEE
96views Hardware» more  ISSS 1995»
15 years 8 months ago
Time-constrained code compaction for DSPs
{DSP algorithms in most cases are subject to hard real-time constraints. In case of programmable DSP processors, meeting those constraints must be ensured by appropriate code gener...
Rainer Leupers, Peter Marwedel
ISSS
1995
IEEE
109views Hardware» more  ISSS 1995»
15 years 8 months ago
1995 high level synthesis design repository
In this paper we brie y describe a set of designs that can serve as examples for High Level Synthesis (HLS) systems. The designs vary in complexity from simple behavioral nite st...
Preeti Ranjan Panda, Nikil D. Dutt