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ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 8 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
86
Voted
ISCAS
1995
IEEE
55views Hardware» more  ISCAS 1995»
15 years 8 months ago
Linearising Sigma-Delta Modulators Using Dither and Chaos
- Recent work has shown that high-order single-bit sigma-delta modulators suffer from lowlevel artifacts such as idle tones and noise modulation. Techniques that have been proposed...
Chris Dunn, Mark B. Sandler
75
Voted
ISCAS
1995
IEEE
97views Hardware» more  ISCAS 1995»
15 years 8 months ago
NESP: An Analog Neural Signal Processor
Mario Costa, Davide Palmisano, Eros Pasero
ISCAS
1995
IEEE
70views Hardware» more  ISCAS 1995»
15 years 8 months ago
Minimum-Cost Bounded-Skew Clock Routing
In this paper, we present a new clock routing algorithm which minimizes total wirelength under any given path-length skew bound. The algorithm constructs a bounded-skew tree (BST)...
Jason Cong, Cheng-Kok Koh
100
Voted
ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 8 months ago
Adaptive Carrier Recovery Using Multi-Order DPLL for Mobile Communication Applications
Byungjin Chun, Beomsup Kim, Yong Hong Lee