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108
Voted
FPL
2000
Springer
103views Hardware» more  FPL 2000»
15 years 7 months ago
Evaluation of Accelerator Designs for Subgraph Isomorphism Problem
Many applications can be modeled as subgraph isomorphism problems. However, this problem is generally NP-complete and difficult to compute. A custom computing circuit is a prospect...
Shuichi Ichikawa, Hidemitsu Saito, Lerdtanaseangth...
143
Voted
FPL
2000
Springer
187views Hardware» more  FPL 2000»
15 years 7 months ago
Mapping of DSP Algorithms on Field Programmable Function Arrays
This position paper1 discusses reconfigurability issues in low-power handheld multimedia systems. A reconfigurable systems-architecture is introduced, with a focus on a Field Progr...
Paul M. Heysters, Jaap Smit, Gerard J. M. Smit, Pa...
137
Voted
FPL
2000
Springer
96views Hardware» more  FPL 2000»
15 years 7 months ago
Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures
Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years. They promise to be more adequate for computational tasks due to their better...
Reiner W. Hartenstein, Michael Herz, Thomas Hoffma...
FPL
2000
Springer
116views Hardware» more  FPL 2000»
15 years 7 months ago
High-Level Area and Performance Estimation of Hardware Building Blocks on FPGAs
Abstract. Field-programmable gate arrays (FPGAs) have become increasingly interesting in system design and due to the rapid technological progress ever larger devices are commercia...
Rolf Enzler, Tobias Jeger, Didier Cottet, Gerhard ...
86
Voted
FPL
2000
Springer
93views Hardware» more  FPL 2000»
15 years 7 months ago
Behavioural Language Compilation with Virtual Hardware Management
Oliver Diessel, George J. Milne