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106
Voted
FPL
2000
Springer
122views Hardware» more  FPL 2000»
15 years 7 months ago
A Placement Algorithm for FPGA Designs with Multiple I/O Standards
State-of-the-art FPGAs possess I/O resources that can be configured to support a wide variety of I/O standards [1]. In such devices, the I/O resources are grouped into banks. One o...
Jason Helge Anderson, Jim Saunders, Sudip Nag, Cha...
127
Voted
FPGA
2000
ACM
109views FPGA» more  FPGA 2000»
15 years 7 months ago
Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays
It has become clear that on-chip storage is an essential component of high-density FPGAs. These arrays were originally intended to implement storage, but recent work has shown tha...
Steven J. E. Wilton
146
Voted
FPGA
2000
ACM
145views FPGA» more  FPGA 2000»
15 years 7 months ago
A C compiler for a processor with a reconfigurable functional unit
This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that c...
Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerje...
136
Voted
FPGA
2000
ACM
120views FPGA» more  FPGA 2000»
15 years 7 months ago
A novel high throughput reconfigurable FPGA architecture
With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
Amit Singh, Luca Macchiarulo, Arindam Mukherjee, M...
157
Voted
FPGA
2000
ACM
479views FPGA» more  FPGA 2000»
15 years 7 months ago
Implementing a RAKE receiver for wireless communications on an FPGA-based computer system
RAKE receivers are widely used in the wireless communications industry. Currently, custom VLSI is the most popular implementation. Programmable and reconfigurable logic implementa...
Ali M. Shankiti, Miriam Leeser