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118
Voted
FPL
2000
Springer
124views Hardware» more  FPL 2000»
15 years 7 months ago
Balancing Logic Utilization and Area Efficiency in FPGAs
Abstract. In this paper we outline a procedure to determine appropriate partitioning of programmable logic and interconnect area to minimize overall device area across a broad rang...
Russell Tessier, Heather Giza
155
Voted
FPL
2000
Springer
155views Hardware» more  FPL 2000»
15 years 7 months ago
Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
Valery Sklyarov
115
Voted
FPL
2000
Springer
93views Hardware» more  FPL 2000»
15 years 7 months ago
Reconfigurable Computing between Classifications and Metrics - The Approach of Space/Time-Scheduling
Abstract. Reconfigurable computing receives its merits from scheduling timebased into space-based execution. This paper reviews some common parameters and introduces an additional ...
Christian Siemers
136
Voted
FPL
2000
Springer
119views Hardware» more  FPL 2000»
15 years 7 months ago
A Self-Reconfigurable Gate Array Architecture
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro M...
128
Voted
FPL
2000
Springer
128views Hardware» more  FPL 2000»
15 years 7 months ago
Verification of Dynamically Reconfigurable Logic
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
David Robinson, Patrick Lysaght