This paper describes a solution for the generation of true random numbers in a purely digital fashion; making it suitable for any FPGA type, because no FPGA vendor specific featur...
Dries Schellekens, Bart Preneel, Ingrid Verbauwhed...
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
We present a heavily parametrized tool suite that allows the modeling and exploration of heterogeneous, coarse-grained, heavily pipelined reconfigurable architectures. Our tools p...
An intermediate representation (IR) is a central structure around which tools such as compilers and synthesis tools are built. In this paper we propose such an IR specifically des...