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110
Voted
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
15 years 7 months ago
Smaller Two-Qubit Circuits for Quantum Communication and Computation
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to librar...
Vivek V. Shende, Igor L. Markov, Stephen S. Bulloc...
134
Voted
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
15 years 7 months ago
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
Anuja Sehgal, Krishnendu Chakrabarty
103
Voted
DATE
2004
IEEE
115views Hardware» more  DATE 2004»
15 years 7 months ago
Aspects of Formal and Graphical Design of a Bus System
This study shows the derivation of a local segmented bus arbiter from an original single segment bus arbiter. The operations are performed in the formal framework of action system...
Tiberiu Seceleanu, Tomi Westerlund
148
Voted
DATE
2004
IEEE
109views Hardware» more  DATE 2004»
15 years 7 months ago
RTL Processor Synthesis for Architecture Exploration and Implementation
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
Oliver Schliebusch, Anupam Chattopadhyay, Rainer L...
113
Voted
DATE
2004
IEEE
110views Hardware» more  DATE 2004»
15 years 7 months ago
Interactive Cosimulation with Partial Evaluation
We present a technique to improve the efficiency of hardware-software cosimulation, using design information known at simulator compile-time. The generic term for such optimizatio...
Patrick Schaumont, Ingrid Verbauwhede