Sciweavers

122
Voted
DATE
2004
IEEE
132views Hardware» more  DATE 2004»
15 years 7 months ago
Hybrid Architectural Dynamic Thermal Management
When an application or external environmental conditions cause a chip's cooling capacity to be exceeded, dynamic thermal management (DTM) dynamically reduces the power densit...
Kevin Skadron
127
Voted
DATE
2004
IEEE
126views Hardware» more  DATE 2004»
15 years 7 months ago
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
Montek Singh, Michael Theobald
125
Voted
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 7 months ago
Communication Analysis for System-On-Chip Design
In this paper we present an approach for analysis of systems of parallel, communicating processes for SoC design. We present a method to detect communications that synchronize the...
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosens...
133
Voted
DATE
2004
IEEE
136views Hardware» more  DATE 2004»
15 years 7 months ago
Compact Binaries with Code Compression in a Software Dynamic Translator
Embedded software is becoming more flexible and adaptable, which presents new challenges for management of highly constrained system resources. Software dynamic translation is a t...
Stacey Shogan, Bruce R. Childers
165
Voted
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 7 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...