146
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CGO
2004
IEEE
15 years 7 months ago
2004
IEEE
Efficient inter-thread value communication is essential for improving performance in Thread-Level Speculation (TLS). Although several mechanisms for improving value communication ...
146
click to vote
CGO
2004
IEEE
15 years 7 months ago
2004
IEEE
Instruction scheduling hardware can be simplified and easily pipelined if pairs of dependent instructions are fused so they share a single instruction scheduling slot. We study an...
154
click to vote
CGO
2004
IEEE
15 years 7 months ago
2004
IEEE
Dynamic optimization systems store optimized or translated code in a software-managed code cache in order to maximize reuse of transformed code. Code caches store superblocks that...
144
click to vote
CGO
2004
IEEE
15 years 7 months ago
2004
IEEE
Memory profiling is the process of characterizing a program's memory behavior by observing and recording its response to specific input sets. Relevant aspects of the program&...