Switching using parallel input-output queued switches with no speedup

Abstract--We propose an efficient parallel switching architecture that requires no speedup and guarantees bounded delay. Our architecture consists of input

• Type: Journal
• Year: 2002
• Where: TON
• Authors: Saad Mneimneh, Vishal Sharma, Kai-Yeung Siu
• Keywords: Efficient Parallel, Input­output-queued Switches, Parallel Switches, TON 2002