238
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DAC
15 years 10 months ago
2010 ACM
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
191
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DAC
15 years 10 months ago
2010 ACM
The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...
181
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DAC
15 years 10 months ago
2010 ACM
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
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