186
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GLVLSI
14 years 2 months ago
2011 IEEE 
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
190
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GLVLSI
14 years 2 months ago
2011 IEEE 
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
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VLSI