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MEMOCODE
2010
IEEE
14 years 12 months ago
A formal executable semantics of Verilog
This paper describes a formal executable semantics for the Verilog hardware description language. The goal of our formalization is to provide a concise and mathematically rigorous...
Patrick O'Neil Meredith, Michael Katelman, Jos&eac...
ICSE
2001
IEEE-ACM
15 years 6 months ago
A Scalable Formal Method for Design and Automatic Checking of User Interfaces
The paper addresses the formal specification, design and implementation of the behavioral component of graphical user interfaces. The complex sequences of visual events and action...
Jean Berstel, Stefano Crespi-Reghizzi, Gilles Rous...
DSD
2002
IEEE
86views Hardware» more  DSD 2002»
15 years 7 months ago
Using Formal Tools to Study Complex Circuits Behaviour
We use a formal tool to extract Finite State Machines (FSM) based representations (lists of states and transitions) of sequential circuits described by flip-flops and gates. The...
Paul Amblard, Fabienne Lagnier, Michel Lévy
TPHOL
2002
IEEE
15 years 6 months ago
A Proposal for a Formal OCL Semantics in Isabelle/HOL
Abstract We present a formal semantics as a conservative shallow embedding of the Object Constraint Language (OCL). OCL is currently under development within an open standardizatio...
Achim D. Brucker, Burkhart Wolff
ICST
2008
IEEE
15 years 8 months ago
Designing and Building a Software Test Organization
–Abstract for conference - preliminary Model-Based Testing: Models for Test Cases Jan Tretmans, Embedded Systems Institute, Eindhoven : Systematic testing of software plays an im...
Bruce Benton