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» A Hierarchy Based on Output Multiplicity
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85
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ISCAS
2008
IEEE
154views Hardware» more  ISCAS 2008»
15 years 4 months ago
A 6.3nJ/op low energy 160-bit modulo-multiplier for elliptic curve cryptography processor
— A low energy modulo-multiplier is proposed for elliptic curve cryptography (ECC) processor, especially for authentication in mobile device or key encryption in embedded health-...
Hyejung Kim, Yongsang Kim, Hoi-Jun Yoo
ICDAR
2007
IEEE
15 years 4 months ago
Combining On-Line and Off-Line Systems for Handwriting Recognition
In this paper we present a new multiple classifier system (MCS) for recognizing notes written on a whiteboard. This MCS combines one off-line and two on-line handwriting recognit...
Marcus Liwicki, Horst Bunke
GLOBECOM
2006
IEEE
15 years 3 months ago
An Iterative QR-SIC Receiver for Concatenated Space Frequency Coding Schemes in Severe Multipath Channels
Abstract—This paper studies an efficient receiver design for concatenated space-frequency coded orthogonal frequency division multiplexing (OFDM) systems under severe multipath c...
Tung X. Lai, Siva D. Muruganathan, Abu B. Sesay
3DPVT
2002
IEEE
166views Visualization» more  3DPVT 2002»
15 years 2 months ago
Octree-based Fusion of Shape from Silhouette and Shape from Structured Light
An algorithm for the automatic construction of a 3d model of archaeological vessels using two different 3d algorithms is presented. In archeology the determination of the exact vo...
Martin Kampel, Srdan Tosovic, Robert Sablatnig
66
Voted
HOTI
2002
IEEE
15 years 2 months ago
A Four-Terabit Single-Stage Packet Switch with Large Round-Trip Time Support
We present the architecture and practical VLSI implementation of a 4-Tb/s single-stage switch. It is based on a combined input- and crosspoint-queued structure with virtual output...
François Abel, Cyriel Minkenberg, Ronald P....