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» A Network on Chip Architecture and Design Methodology
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ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
15 years 8 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
IPPS
2007
IEEE
15 years 6 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
ICCAD
2005
IEEE
95views Hardware» more  ICCAD 2005»
15 years 8 months ago
Application-specific network-on-chip architecture customization via long-range link insertion
Networks-on-Chip (NoCs) represent a promising solution to complex on-chip communication problems. The NoC communication architectures considered so far are based on either complete...
Ümit Y. Ogras, Radu Marculescu
TIM
2010
139views Education» more  TIM 2010»
14 years 6 months ago
A Design Approach For Digital Controllers Using Reconfigurable Network-Based Measurements
In this paper, the authors propose and analyze a network-based control architecture for power-electronicsbuilding-block-based converters. The objective of the proposed approach is ...
Rong Liu, Antonello Monti, Ferdinanda Ponci, Anton...
JSA
2007
123views more  JSA 2007»
14 years 11 months ago
Application of deterministic and stochastic Petri-Nets for performance modeling of NoC architectures
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Ch...
Holger Blume, Thorsten von Sydow, Daniel Becker, T...