13 search results - page 1 / 3 » A reconfigurable multi-function computing cache architecture |
106
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FPGA
2000
ACM
15 years 3 months ago
2000
ACM
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
100
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IPPS
2006
IEEE
15 years 5 months ago
2006
IEEE
In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propo...
110
Voted
DAC
2007
ACM
16 years 18 days ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
105
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DAC
2009
ACM
16 years 18 days ago
2009
ACM
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
100
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HPCA
2009
IEEE
16 years 4 days ago
2009
IEEE
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...