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DAC
2005
ACM
15 years 9 months ago
Multiplexer restructuring for FPGA implementation cost reduction
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
Paul Metzgen, Dominic Nancekievill
CCGRID
2006
IEEE
16 years 1 months ago
Integrating the HLA RTI Services with Scilab
This paper describes the integration of the High Level Architecture (HLA), an IEEE standard for distributed interactive simulation, with a scientific software package (Scilab) and...
Thitima Theppaya, Pichaya Tandayya, Chatchai Janta...
IPPS
2009
IEEE
16 years 1 months ago
Evaluating the use of GPUs in liver image segmentation and HMMER database searches
In this paper we present the results of parallelizing two life sciences applications, Markov random fieldsbased (MRF) liver segmentation and HMMER’s Viterbi algorithm, using GP...
John Paul Walters, Vidyananth Balu, Suryaprakash K...
HPDC
2007
IEEE
16 years 1 months ago
Precise and realistic utility functions for user-centric performance analysis of schedulers
Utility functions can be used to represent the value users attach to job completion as a function of turnaround time. Most previous scheduling research used simple synthetic repre...
Cynthia Bailey Lee, Allan Snavely
IPPS
2007
IEEE
16 years 1 months ago
Dynamic Load-Balancing and High Performance Communication in Jcluster
This paper describes the dynamic load-balancing and high performance communication provided in Jcluster, an efficient Java parallel environment. For the efficient loadbalancing,...
Bao-Yin Zhang, Zeyao Mo, Guangwen Yang, Weimin Zhe...