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ISCAS
2007
IEEE
141views Hardware» more  ISCAS 2007»
15 years 5 months ago
Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes
Abstract— We analyze the decoding algorithm for regular timeinvariant LDPC convolutional codes as a 3D signal processing scheme and derive several parallelization concepts, which...
Emil Matús, Marcos B. S. Tavares, Marcel Bi...
ECAI
2006
Springer
15 years 3 months ago
How to Analyze Free Text Descriptions for Recommending TV Programmes?
ct This paper presents an approach to exploit free text descriptions of TV programmes as available from EPG data sets for a recommendation system that takes the content of programm...
Bernd Ludwig, Stefan Mandl
ASPDAC
2000
ACM
96views Hardware» more  ASPDAC 2000»
15 years 3 months ago
A programmable built-in self-test core for embedded memories
Testing embedded memories is becoming an industry-wide concern with the advent of deep-submicron technology and system-on-chip applications. We present a prototype chip for a progr...
Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu
VISUALIZATION
2003
IEEE
15 years 4 months ago
Fast Volume Segmentation With Simultaneous Visualization Using Programmable Graphics Hardware
Segmentation of structures from measured volume data, such as anatomy in medical imaging, is a challenging data-dependent task. In this paper, we present a segmentation method tha...
Anthony Sherbondy, Michael Houston, Sandy Napel
ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
13 years 2 months ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek