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ICCS
2005
Springer
15 years 3 months ago
Performance and Scalability Analysis of Cray X1 Vectorization and Multistreaming Optimization
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
Sadaf R. Alam, Jeffrey S. Vetter
GRID
2006
Springer
14 years 9 months ago
Multi-Replication with Intelligent Staging in Data-Intensive Grid Applications
Existing data grid scheduling systems handle huge data I/O via replica location services coupled with simple staging, decoupled from scheduling of computing tasks. However, when th...
Yuya Machida, Shin'ichiro Takizawa, Hidemoto Nakad...
SAC
2009
ACM
15 years 4 months ago
Celling SHIM: compiling deterministic concurrency to a heterogeneous multicore
Parallel architectures are the way of the future, but are notoriously difficult to program. In addition to the low-level constructs they often present (e.g., locks, DMA, and non-...
Nalini Vasudevan, Stephen A. Edwards
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IPPS
2007
IEEE
15 years 3 months ago
Scheduling in the Z-Polyhedral Model
The polyhedral model is extensively used for analyses and transformations of regular loop programs, one of the most important being automatic parallelization. The model, however, ...
Gautam Gupta, DaeGon Kim, Sanjay V. Rajopadhye
CLUSTER
2008
IEEE
15 years 4 months ago
Intelligent compilers
—The industry is now in agreement that the future of architecture design lies in multiple cores. As a consequence, all computer systems today, from embedded devices to petascale ...
John Cavazos