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CODES
2006
IEEE
15 years 3 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
DAC
2007
ACM
15 years 10 months ago
Implicitly Parallel Programming Models for Thousand-Core Microprocessors
This paper argues for an implicitly parallel programming model for many-core microprocessors, and provides initial technical approaches towards this goal. In an implicitly paralle...
Wen-mei W. Hwu, Shane Ryoo, Sain-Zee Ueng, John H....
GPC
2008
Springer
14 years 10 months ago
An Automatic and Scalable Testing Tool for Workflow Systems
Nowadays workflow systems are widely deployed around the world, especially within large international corporations. Thus the performance evaluation of these workflow systems becom...
Lin Quan, Xiaozhu Lin, Jianmin Wang
DAC
1996
ACM
15 years 1 months ago
Characterization and Parameterized Random Generation of Digital Circuits
The development of new Field-Programmed, MaskProgrammed and Laser-Programmed Gate Array architectures is hampered by the lack of realistic test circuits that exercise both the arc...
Michael D. Hutton, Jerry P. Grossman, Jonathan Ros...
VISUALIZATION
2005
IEEE
15 years 3 months ago
General Purpose Computation on Graphics Hardware
The rapid increase in the performance of graphics hardware, coupled with recent improvements in its programmability, have made graphics hardware a compelling platform for computat...
Aaron E. Lefohn, Ian Buck, Patrick S. McCormick, J...