312 search results - page 39 / 63 » Architectural approaches to reduce leakage energy in caches |
106
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ISCA
1995
IEEE
15 years 3 months ago
1995
IEEE
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
ISCA
2009
IEEE
15 years 6 months ago
2009
IEEE
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
106
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ICCD
2008
IEEE
15 years 8 months ago
2008
IEEE
- In this paper, we analyze the impact of network contention on the application mapping for tile-based Networkon-Chip (NoC) architectures. Our main theoretical contribution consist...
COMPSAC
2005
IEEE
15 years 5 months ago
2005
IEEE
This research aims at developing an approach for architecting and communicating software systems in the context of wireless sensor networks. In particular, it focuses on developin...
ISLPED
2004
ACM
15 years 5 months ago
2004
ACM
Leakage power is a major concern in current and future microprocessor designs. In this paper, we explore the potential of architectural techniques to reduce leakage through power-...