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ISCA
2012
IEEE
234views Hardware» more  ISCA 2012»
13 years 6 months ago
PARDIS: A programmable memory controller for the DDRx interfacing standards
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
Mahdi Nazm Bojnordi, Engin Ipek
OSDI
1994
ACM
15 years 5 months ago
HiPEC: High Performance External Virtual Memory Caching
Traditional operating systems use a xed LRU-like page replacement policy and centralized frame pool that cannot properly serve all types of memory access patterns of various appli...
Chao-Hsien Lee, Meng Chang Chen, Ruei-Chuan Chang
VLDB
1992
ACM
83views Database» more  VLDB 1992»
15 years 8 months ago
A Performance Study of Alternative Object Faulting and Pointer Swizzling Strategies
This paper presents a portable, efficient method for accessing memory resident persistent objects in virtual memory in the context of the E programming language. Under the approac...
Seth J. White, David J. DeWitt
CPHYSICS
2004
92views more  CPHYSICS 2004»
15 years 4 months ago
Ultrahigh resolution simulations of mode converted ion cyclotron waves and lower hybrid waves
Full Wave studies of mode conversion (MC) processes in toroidal plasmas have required prohibitive amount of computer resources in the past because of the disparate spatial scales ...
J. C. Wright, P. T. Bonoli, E. D'Azevedo, M. Bramb...
IPPS
2006
IEEE
15 years 10 months ago
A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead
Currently run-time reconfigurable hardware offers really attractive features for embedded systems, such as flexibility, reusability, high performance and, in some cases, low-power...
Elena Perez Ramo, Javier Resano, Daniel Mozos, Fra...