170 search results - page 19 / 34 » Challenges in Embedded Memory Design and Test |
125
Voted
XPU
2005
Springer
15 years 9 months ago
2005
Springer
The main goal to be answered by this Ph.D. thesis is whether there is a potential for a successful and powerful application of agile methods and related techniques to embedded syst...
125
Voted
CODES
2007
IEEE
15 years 10 months ago
2007
IEEE
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
93
Voted
CEC
2010
IEEE
15 years 4 months ago
2010
IEEE
Large-scale global optimization (LSGO) is a very important and challenging task in optimization domain, which is embedded in many scientific and engineering applications. In this p...
220
Voted
ARVLSI
2001
IEEE
15 years 7 months ago
2001
IEEE
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...
155
Voted
DATE
2010
IEEE
15 years 8 months ago
2010
IEEE
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...