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IPPS
2007
IEEE
15 years 11 months ago
Splice: A Standardized Peripheral Logic and Interface Creation Engine
Recent advancements in FPGA technology have allowed manufacturers to place general-purpose processors alongside user-configurable logic gates on a single chip. At first glance, ...
Justin Thiel, Ron K. Cytron
ISMVL
2007
IEEE
92views Hardware» more  ISMVL 2007»
15 years 11 months ago
Experimental Studies on SAT-Based ATPG for Gate Delay Faults
The clock rate of modern chips is still increasing and at the same time the gate size decreases. As a result, already slight variations during the production process may cause a f...
Stephan Eggersglüß, Daniel Tille, G&oum...
135
Voted
ASPDAC
2006
ACM
166views Hardware» more  ASPDAC 2006»
15 years 11 months ago
Temperature-aware routing in 3D ICs
Three-dimensional integrated circuits (3D ICs) provide an attractive solution for improving circuit performance. Such solutions must be embedded in an electrothermally-conscious d...
Tianpei Zhang, Yong Zhan, Sachin S. Sapatnekar
131
Voted
CEC
2005
IEEE
15 years 10 months ago
Dynamic power minimization during combinational circuit testing as a traveling salesman problem
Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume sig...
Artem Sokolov, Alodeep Sanyal, L. Darrell Whitley,...
121
Voted
ISCAS
2005
IEEE
154views Hardware» more  ISCAS 2005»
15 years 10 months ago
Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filters
We propose an analog current-mode subthreshold CMOS circuit implementing a neuromorphic oscillator. Our circuit is based on the half-center oscillator model proposed by Matsuoka, ...
Kazuki Nakada, Tetsuya Asai, Yoshihito Amemiya