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» Compiled hardware acceleration of Molecular Dynamics code
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IPPS
2007
IEEE
15 years 3 months ago
Porting the GROMACS Molecular Dynamics Code to the Cell Processor
The Cell processor offers substantial computational power which can be effectively utilized only if application design and implementation are tuned to the Cell architecture. In th...
Stephen Olivier, Jan Prins, Jeff Derby, Ken V. Vu
CODES
2007
IEEE
15 years 3 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
FPL
2008
Springer
150views Hardware» more  FPL 2008»
14 years 11 months ago
Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs
Wavefront algorithms, such as the Smith-Waterman algorithm, are commonly used in bioinformatics for exact local and global sequence alignment. These algorithms are highly computat...
Betul Buyukkurt, Walid A. Najjar
DATE
2006
IEEE
123views Hardware» more  DATE 2006»
15 years 3 months ago
Constructing portable compiled instruction-set simulators: an ADL-driven approach
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
Joseph D'Errico, Wei Qin
ASPDAC
1998
ACM
86views Hardware» more  ASPDAC 1998»
15 years 1 months ago
Parallelization in Co-Compilation for Configurable Accelerators
— The paper introduces a novel co-compiler and its “vertical” parallelization method, including a general model for co-operating host/accelerator platforms and a new parallel...
Jürgen Becker, Reiner W. Hartenstein, Michael...