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» Compiler Architectures for Heterogeneous Systems
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NOCS
2007
IEEE
15 years 10 months ago
Fast, Accurate and Detailed NoC Simulations
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
Pascal T. Wolkotte, Philip K. F. Hölzenspies,...
FPL
2010
Springer
134views Hardware» more  FPL 2010»
15 years 2 months ago
GPU Versus FPGA for High Productivity Computing
Heterogeneous or co-processor architectures are becoming an important component of high productivity computing systems (HPCS). In this work the performance of a GPU based HPCS is c...
David Huw Jones, Adam Powell, Christos-Savvas Boug...
CBMS
2003
IEEE
15 years 9 months ago
Integration of Distributed Healthcare Records: Publishing Legacy Data as XML Documents Compliant with CEN/TC251 ENV13606
To support co-operative work among health professionals and institutions it is necessary to share healthcare information about patients in a meaningful way. But, nowadays, in most...
José Alberto Maldonado, Montserrat Robles, ...
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
16 years 4 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...
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IWMM
2000
Springer
137views Hardware» more  IWMM 2000»
15 years 7 months ago
Cycles to Recycle: Garbage Collection on the IA-64
The IA-64, Intel's 64-bit instruction set architecture, exhibits a number of interesting architectural features. Here we consider those features as they relate to supporting ...
Richard L. Hudson, J. Eliot B. Moss, Sreenivas Sub...