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SIGSOFT
2006
ACM
15 years 11 months ago
Controlling factors in evaluating path-sensitive error detection techniques
Matthew B. Dwyer, Suzette Person, Sebastian G. Elb...
DFT
2008
IEEE
151views VLSI» more  DFT 2008»
15 years 13 days ago
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris...
JSAC
2006
79views more  JSAC 2006»
14 years 10 months ago
On the performance of multicarrier DS-CDMA with imperfect power control and variable spreading factors
Multicarrier direct-sequence code-division multiple access (MC-DS-CDMA) becomes an attractive technique for the future fourth-generation (4G) wireless system because it can flexibl...
Li-Chun Wang, Chih-Wen Chang
DFT
2006
IEEE
130views VLSI» more  DFT 2006»
15 years 4 months ago
Off-Chip Control Flow Checking of On-Chip Processor-Cache Instruction Stream
Control flow checking (CFC) is a well known concurrent checking technique for ensuring that a program’s instruction execution sequence follows permissible paths. Almost all CFC...
Federico Rota, Shantanu Dutt, Sahithi Krishna
ASPLOS
2011
ACM
14 years 2 months ago
ConSeq: detecting concurrency bugs through sequential errors
Concurrency bugs are caused by non-deterministic interleavings between shared memory accesses. Their effects propagate through data and control dependences until they cause softwa...
Wei Zhang, Junghee Lim, Ramya Olichandran, Joel Sc...