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FCCM
2007
IEEE
111views VLSI» more  FCCM 2007»
15 years 9 months ago
A Structural Object Programming Model, Architecture, Chip and Tools for Reconfigurable Computing
A new platform for reconfigurable computing has an object-based programming model, with architecture, silicon and tools designed to faithfully realize this model. The platform is ...
Michael Butts, Anthony Mark Jones, Paul Wasson
IPPS
2007
IEEE
15 years 9 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson
ISCC
2005
IEEE
15 years 8 months ago
Optimal Delay-Constrained Minimum Cost Loop Algorithm for Local Computer Network
This study deals with the Delay-Constrained Minimum Cost Loop Problem (DC-MCLP) of finding several loops from a source node. The DC-MCLP consists of finding a set of minimum cost ...
Yong-Jin Lee, Mohammed Atiquzzaman
IPPS
2007
IEEE
15 years 9 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
ISORC
1998
IEEE
15 years 7 months ago
Automating Regression Testing for Real-Time Software in a Distributed Environment
Many real-time systems evolve over time due to new requirements and technology improvements. Each revision requires regression testing to ensure that existing functionality is not...
Feng Zhu, Sanjai Rayadurgam, Wei-Tek Tsai