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NOSSDAV
2009
Springer
15 years 4 months ago
A delaunay triangulation architecture supporting churn and user mobility in MMVEs
This article proposes a new distributed architecture for update message exchange in massively multi-user virtual environments (MMVE). MMVE applications require delivery of updates...
Mohsen Ghaffari, Behnoosh Hariri, Shervin Shirmoha...
MICRO
2003
IEEE
106views Hardware» more  MICRO 2003»
15 years 3 months ago
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, P...
FPL
2007
Springer
137views Hardware» more  FPL 2007»
15 years 4 months ago
Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA
Multiprocessor systems-on-chip (MPSoC) are being developed in increasing numbers to support the high number of applications running on modern embedded systems. Designing and progr...
Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesm...
ET
2002
115views more  ET 2002»
14 years 9 months ago
CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing
As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CASBUS that solves ...
Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki
ISPASS
2007
IEEE
15 years 4 months ago
Modeling and Characterizing Power Variability in Multicore Architectures
Parameter variation due to manufacturing error will be an unavoidable consequence of technology scaling in future generations. The impact of random variation in physical factors s...
Ke Meng, Frank Huebbers, Russ Joseph, Yehea I. Ism...