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IFIP
2000
Springer
15 years 1 months ago
A Product Family Approach to Graceful Degradation
Design of gracefully degrading systems, where functionality is gradually reduced in the face of faults, has traditionally been a very difficult and error-prone task. General appro...
William Nace, Phil Koopman
CC
2008
Springer
240views System Software» more  CC 2008»
14 years 11 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
15 years 10 months ago
Automatic Model Refinement for Fast Architecture Exploration
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An arch...
Junyu Peng, Samar Abdi, Daniel Gajski
DEXAW
2000
IEEE
137views Database» more  DEXAW 2000»
15 years 2 months ago
A Holonic Component-Based Approach to Reconfigurable Manufacturing Control Architecture
Holonic Manufacturing Systems have emerged over the last seven years as strategy for manufacturing control system design. A new approach called Holonic ComponentBased Architecture...
Jin-Lung Chirn, Duncan C. McFarlane
ASPDAC
2008
ACM
97views Hardware» more  ASPDAC 2008»
14 years 11 months ago
A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
Aviral Shrivastava, Ilya Issenin, Nikil Dutt