115 search results - page 13 / 23 » Deterministic Test Pattern Generation Techniques for Sequent... |
DAC
1990
ACM
15 years 3 months ago
1990
ACM
Symbolic simulation involves evaluating circuit behavior using special symbolic values to encode a range of circuit operating conditions. In one simulation run, a symbolic simulat...
97
Voted
ET
2002
14 years 11 months ago
2002
In this paper we present a new reseeding technique for test-per-clock test pattern generation suitable for at-speed testing of circuits with random-pattern resistant faults. Our te...
DAC
2007
ACM
16 years 20 days ago
2007
ACM
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
84
Voted
CEC
2005
IEEE
15 years 5 months ago
2005
IEEE
Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume sig...
ICCD
2001
IEEE
15 years 8 months ago
2001
IEEE
We present a simulation-based semi-formal verification method for sequential circuits described at the registertransfer level. The method consists of an iterative loop where cove...