Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...
Current high-end parallel systems achieve low-latency, highbandwidth network communication through the use of aggressive design techniques and expensive mechanical and electrical ...
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Good network hardware performance is often squandered by overheads for accessing the network interface (NI) within a host. NIs that support user-level messaging avoid frequent ope...
Ad-hoc networks consist of a set of mobile hosts that communicate using wireless links, without the use of other communication support facilities (such as base stations). The topo...
Kartik Chandran, Sudarshan Raghunathan, S. Venkate...