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» Dynamic Register Renaming Through Virtual-Physical Registers
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IPPS
2006
IEEE
14 years 8 days ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
IEEEPACT
2009
IEEE
14 years 27 days ago
CPROB: Checkpoint Processing with Opportunistic Minimal Recovery
—CPR (Checkpoint Processing and Recovery) is a physical register management scheme that supports a larger instruction window and higher average IPC than conventional ROB-style re...
Andrew D. Hilton, Neeraj Eswaran, Amir Roth
CASES
2007
ACM
13 years 8 months ago
Facilitating compiler optimizations through the dynamic mapping of alternate register structures
Aggressive compiler optimizations such as software pipelining and loop invariant code motion can significantly improve application performance, but these transformations often re...
Chris Zimmer, Stephen Roderick Hines, Prasad Kulka...
EMSOFT
2004
Springer
13 years 11 months ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande
ICCD
2006
IEEE
103views Hardware» more  ICCD 2006»
14 years 3 months ago
Reduce Register Files Leakage Through Discharging Cells
— We propose a low-leakage register file cell design based on the observation that the physical registers in a superscalar processor have very short life cycles. When a register...
Lingling Jin, Wei Wu, Jun Yang 0002, Chuanjun Zhan...