555 search results - page 34 / 111 » Efficient event-driven simulation of parallel processor arch... |
ISLPED
2003
ACM
15 years 3 months ago
2003
ACM
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
IPPS
2002
IEEE
15 years 2 months ago
2002
IEEE
Eclipse is a heterogeneous multiprocessor architecture for high-performance media processing, including highdefinition MPEG encoding/decoding. The scalable architecture framework ...
102
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AINA
2004
IEEE
15 years 1 months ago
2004
IEEE
Efficient computing the PageRank scores for a large web graph is actually one of the hot issues in Web-IR community. Recent researches propose to accelerate the computation, both ...
IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
DAC
1996
ACM
15 years 2 months ago
1996
ACM
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...