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IPPS
2007
IEEE
15 years 10 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao
EMSOFT
2006
Springer
15 years 7 months ago
Compiler-assisted leakage energy optimization for clustered VLIW architectures
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...
Rahul Nagpal, Y. N. Srikant
IROS
2009
IEEE
170views Robotics» more  IROS 2009»
15 years 10 months ago
A programming architecture for smart autonomous underwater vehicles
— Autonomous underwater vehicles (AUVs) are an indispensable tool for marine scientists to study the world’s oceans. The Slocum glider is a buoyancy driven AUV designed for mis...
Hans C. Woithe, Ulrich Kremer
DAC
2005
ACM
16 years 5 months ago
Locality-conscious workload assignment for array-based computations in MPSOC architectures
While the past research discussed several advantages of multiprocessor-system-on-a-chip (MPSOC) architectures from both area utilization and design verification perspectives over ...
Feihui Li, Mahmut T. Kandemir
EMSOFT
2005
Springer
15 years 9 months ago
A sink-n-hoist framework for leakage power reduction
Power leakage constitutes an increasing fraction of the total power consumption in modern semiconductor technologies. Recent research efforts have tried to integrate architecture...
Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee