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    TODAES
    2008
    69views more  TODAES 2008»
    Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming
    15 years 4 months ago
    Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming
    Download  www.ee.ucla.edu
    Yu Hu, Yan Lin, Lei He, Tim Tuan
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    TODAES
    2008
    49views more  TODAES 2008»
    Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
    15 years 4 months ago
    Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
    Download  www.es.ele.tue.nl
    Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesm...
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    TRETS
    2008
    42views more  TRETS 2008»
    On the trade-off between power and flexibility of FPGA clock networks
    15 years 4 months ago
    On the trade-off between power and flexibility of FPGA clock networks
    Download  www.ece.ubc.ca
    Julien Lamoureux, Steven J. E. Wilton
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    TRETS
    2008
    46views more  TRETS 2008»
    Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations
    15 years 4 months ago
    Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations
    Download  cas.ee.ic.ac.uk
    N. Pete Sedcole, Peter Y. K. Cheung
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    TSMC
    2008
    137views more  TSMC 2008»
    A Type-2 Self-Organizing Neural Fuzzy System and Its FPGA Implementation
    15 years 4 months ago
    A Type-2 Self-Organizing Neural Fuzzy System and Its FPGA Implementation
    Download  ir.itri.org.tw
    This paper proposes a type-2 self-organizing neural fuzzy system (T2SONFS) and its hardware implementation. The antecedent parts in each T2SONFS fuzzy rule are interval type-2 fuzz...
    Chia-Feng Juang, Yu-Wei Tsao
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