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EVOW
2006
Springer
15 years 1 months ago
On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level
Simple digital FIR filters have recently been evolved directly in the reconfigurable gate array, ignoring thus a classical method based on multiply
Lukás Sekanina, Zdenek Vasícek
ISCAS
2005
IEEE
125views Hardware» more  ISCAS 2005»
15 years 3 months ago
Fixed-current method for programming large floating-gate arrays
Speed and Accuracy of programming large floating gate array is limited by precision of current measurement and pulse generator. In this paper a novel floating gate programming m...
Shantanu Chakrabartty, Gert Cauwenberghs
GECCO
2003
Springer
170views Optimization» more  GECCO 2003»
15 years 3 months ago
Hardware Evolution of Analog Speed Controllers for a DC Motor
Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions...
David A. Gwaltney, Michael I. Ferguson
FPGA
2009
ACM
183views FPGA» more  FPGA 2009»
15 years 4 months ago
A comparison of via-programmable gate array logic cell circuits
Via-programmable gate arrays (VPGAs) offer a middle ground between application specific integrated circuits and field programmable gate arrays in terms of flexibility, manufac...
Thomas C. P. Chau, Philip Heng Wai Leong, Sam M. H...
ISQED
2007
IEEE
140views Hardware» more  ISQED 2007»
15 years 4 months ago
Leakage-Conscious Architecture-Level Power Estimation for Partitioned and Power-Gated SRAM Arrays
We propose a methodology and power models for an accurate high-level power estimation of physically partitioned and power-gated SRAM arrays. The models offer accurate estimation o...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...