531 search results - page 43 / 107 » Formal Methods for Networks on Chips |
NOCS
2007
IEEE
15 years 4 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
HPCA
1996
IEEE
15 years 1 months ago
1996
IEEE
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
FMCO
2007
Springer
15 years 3 months ago
2007
Springer
Abstract. Many distributed applications can be understood in terms of components interacting in an open environment. This interaction is not always uniform as the network may consi...
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FORTE
2011
14 years 1 months ago
2011
Abstract. Data centric languages, such as recursive rule based languages, have been proposed to program distributed applications over networks. They simplify greatly the code, whic...
SLIP
2009
ACM
15 years 4 months ago
2009
ACM
This paper proposes an efficient method to predict the worst case of voltage violation by multi-domain clock gating in a three-dimensional (3D) on-chip power network considering l...