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MJ
2006
102views more  MJ 2006»
14 years 11 months ago
Hybrid verification integrating HOL theorem proving with MDG model checking
In this paper, we describe a hybrid tool for hardware formal verification that links the HOL (higher-order logic) theorem prover and (multiway decision graphs) model checker. Our ...
Rabeb Mizouni, Sofiène Tahar, Paul Curzon
CADE
2002
Springer
16 years 2 days ago
Formal Verification of a Combination Decision Procedure
Decision procedures for combinations of theories are at the core of many modern theorem provers such as ACL2, Ehdm, PVS, SIMPLIFY, the Stanford Pascal Verifier, STeP, SVC, and Z/Ev...
Jonathan Ford, Natarajan Shankar
DAC
1996
ACM
15 years 3 months ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson
ICSE
2008
IEEE-ACM
16 years 17 days ago
Formal verification of an automotive scenario in service-oriented computing
We report on the successful application of academic experience with formal modelling and verification techniques to an automotive scenario from the service-oriented computing doma...
Maurice H. ter Beek, Stefania Gnesi, Nora Koch, Fr...
FMCAD
2000
Springer
15 years 3 months ago
A Methodology for Large-Scale Hardware Verification
Abstract. We present a formal verification methodology for datapathdominated hardware. This provides a systematic but flexible framework within which to organize the activities und...
Mark Aagaard, Robert B. Jones, Thomas F. Melham, J...