990 search results - page 147 / 198 » From Design Patterns to Parallel Architectural Skeletons |
ICS
2009
Tsinghua U.
15 years 4 months ago
2009
Tsinghua U.
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
CLUSTER
2008
IEEE
15 years 4 months ago
2008
IEEE
—The industry is now in agreement that the future of architecture design lies in multiple cores. As a consequence, all computer systems today, from embedded devices to petascale ...
ISCC
2005
IEEE
15 years 3 months ago
2005
IEEE
—A framework for designing a family of novel fast CRC generation algorithms is presented. Our algorithms can ideally read arbitrarily large amounts of data at a time, while optim...
CF
2010
ACM
15 years 2 months ago
2010
ACM
Over the past decade, the trajectory to the petascale has been built on increased complexity and scale of the underlying parallel architectures. Meanwhile, software developers hav...
MICRO
2007
IEEE
15 years 4 months ago
2007
IEEE
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...