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» Hardware Architecture of a Parallel Pattern Matching Engine
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CODES
2010
IEEE
14 years 7 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
SI3D
2010
ACM
15 years 4 months ago
Parallel Banding Algorithm to compute exact distance transform with the GPU
We propose a Parallel Banding Algorithm (PBA) on the GPU to compute the exact Euclidean Distance Transform (EDT) for a binary image in 2D and higher dimensions. Partitioning the i...
Thanh-Tung Cao, Ke Tang, Anis Mohamed, Tiow Seng T...
ISORC
2005
IEEE
15 years 3 months ago
An Integrated Architecture for Future Car Generations
Depending on the physical structuring of large distributed safety-critical real-time systems, one can distinguish federated and integrated system architectures. The DECOS architec...
Philipp Peti, Roman Obermaisser, Fulvio Tagliabo, ...
ICPP
2009
IEEE
15 years 4 months ago
End-to-End Study of Parallel Volume Rendering on the IBM Blue Gene/P
—In addition to their role as simulation engines, modern supercomputers can be harnessed for scientific visualization. Their extensive concurrency, parallel storage systems, and...
Tom Peterka, Hongfeng Yu, Robert B. Ross, Kwan-Liu...
DAC
2010
ACM
15 years 29 days ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...