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ASYNC
2002
IEEE
113views Hardware» more  ASYNC 2002»
15 years 2 months ago
A Dual-Mode Synchronous/Asynchronous CORDIC Processor
For application in a software defined radio a CORDIC processor has been developed that can operate both in synchronous and asynchronous mode. Each mode of operation has advantages...
Eckhard Grass, Bodhisatya Sarker, Koushik Maharatn...
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 2 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 3 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
CODES
2003
IEEE
15 years 2 months ago
Hardware support for real-time operating systems
The growing complexity of embedded applications and pressure on time-to-market has resulted in the increasing use of embedded real-time operating systems. Unfortunately, RTOSes ca...
Paul Kohout, Brinda Ganesh, Bruce L. Jacob
70
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IPPS
2007
IEEE
15 years 3 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones