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2008
IEEE
15 years 4 months ago
Context-aware address translation for high performance SMP cluster system
—User-level communication allows an application process to access the network interface directly. Bypassing the kernel requires that a user process accesses the network interface...
Moon-Sang Lee, Joonwon Lee, Seungryoul Maeng
PPOPP
2006
ACM
15 years 3 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
CCS
1999
ACM
15 years 2 months ago
A High-Performance Network Intrusion Detection System
In this paper we present a new approach for network intrusion detection based on concise specifications that characterize normal and abnormal network packet sequences. Our speci...
R. Sekar, Y. Guang, S. Verma, T. Shanbhag
CC
1999
Springer
107views System Software» more  CC 1999»
15 years 2 months ago
Link-Time Improvement of Scheme Programs
Abstract. Optimizing compilers typically limit the scope of their analyses and optimizations to individual modules. This has two drawbacks: rst, library code cannot be optimized to...
Saumya K. Debray, Robert Muth, Scott A. Watterson
MICRO
1997
IEEE
141views Hardware» more  MICRO 1997»
15 years 2 months ago
Unroll-and-Jam Using Uniformly Generated Sets
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
Steve Carr, Yiping Guan