1307 search results - page 63 / 262 » Low Power Hardware for a High Performance PDA |
128
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ISCA
2009
IEEE
15 years 8 months ago
2009
IEEE
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
ICCD
2002
IEEE
15 years 10 months ago
2002
IEEE
Embedded processors are increasingly deployed in applications requiring high performance with good real-time characteristics whilst being low power. Parallelism has to be extracte...
166
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TVLSI
2010
14 years 8 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
115
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IPPS
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
100
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ISCAS
2006
IEEE
15 years 8 months ago
2006
IEEE
— This paper analyzes the behavior of interconnects in the highly structured environment of a network-on-chip (NoC). Two distinct classes of wires are considered, namely links be...