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SIES
2009
IEEE
15 years 10 months ago
A flexible design flow for software IP binding in commodity FPGA
— Software intellectual property (SWIP) is a critical component of increasingly complex FPGA based system on chip (SOC) designs. As a result, developers want to ensure that their...
Michael Gora, Abhranil Maiti, Patrick Schaumont
FPL
2007
Springer
133views Hardware» more  FPL 2007»
15 years 10 months ago
Efficient Modeling and Floorplanning of Embedded-FPGA Fabric
In this paper we present an automatic design flow for generating customized embedded FPGA (eFPGA) fabric and a domain specific SOC+eFPGA architecture. This design flow encompas...
Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guille...
78
Voted
DATE
2006
IEEE
86views Hardware» more  DATE 2006»
15 years 10 months ago
Synthesis of system verilog assertions
In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon validation of system-on-chip(SOC) designs. The System Verilog langua...
Sayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P....
114
Voted
MSE
2005
IEEE
129views Hardware» more  MSE 2005»
15 years 9 months ago
An FPGA-Based Daughtercard for TI's C6000 family of DSKs
In this paper we present an FPGA-based daughtercard designed for TI’s C6000 family of DSP Starter Kits (DSKs). The hardware, initially designed for a course project, provides a ...
Manik Gadhiok, Ricky Hardy, Patrick Murphy, J. Pat...
MSE
2005
IEEE
153views Hardware» more  MSE 2005»
15 years 9 months ago
ipPROCESS: Using a Process to Teach IP-Core Development
The reusing of Intellectual Property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging System-on-chip (SoC) designs. ...
Marilia Lima, Andre Aziz, Diogo José Costa ...