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CL
2007
Springer
14 years 9 months ago
A bulk-synchronous parallel process algebra
The CCS (Calculus of Communicating Systems) process algebra is a well-known formal model of synchronization and communication. It is used for the analysis of safety and liveness i...
Armelle Merlin, Gaétan Hains
ISCC
2009
IEEE
201views Communications» more  ISCC 2009»
15 years 4 months ago
Self-Selecting Reliable Path Routing in diverse Wireless Sensor Network environments
Routing protocols for Wireless Sensor Networks (WSN) face three major performance challenges. The first one is an efficient use of bandwidth that minimizes the transfer delay of p...
Thomas A. Babbitt, Christopher Morrell, Boleslaw K...
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
15 years 6 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
MICRO
2008
IEEE
139views Hardware» more  MICRO 2008»
15 years 3 months ago
Adaptive data compression for high-performance low-power on-chip networks
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
Yuho Jin, Ki Hwan Yum, Eun Jung Kim
CF
2006
ACM
15 years 1 months ago
Landing openMP on cyclops-64: an efficient mapping of openMP to a many-core system-on-a-chip
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
Juan del Cuvillo, Weirong Zhu, Guang R. Gao