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106
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EUROSYS
2010
ACM
16 years 21 days ago
A Comprehensive Scheduler for Asymmetric Multicore Systems
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
Juan Carlos Saez, Manuel Prieto Matias, Alexandra ...
149
Voted
SOSP
2003
ACM
16 years 15 days ago
Terra: a virtual machine-based platform for trusted computing
We present a flexible architecture for trusted computing, called Terra, that allows applications with a wide range of security requirements to run simultaneously on commodity har...
Tal Garfinkel, Ben Pfaff, Jim Chow, Mendel Rosenbl...
CF
2010
ACM
15 years 8 months ago
On-chip communication and synchronization mechanisms with cache-integrated network interfaces
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
Stamatis G. Kavadias, Manolis Katevenis, Michail Z...
128
Voted
ICFP
2007
ACM
15 years 7 months ago
iTasks: executable specifications of interactive work flow systems for the web
In this paper we introduce the iTask system: a set of combinators to specify work flows in a pure functional language at a very high level of abstraction. Work flow systems are au...
Rinus Plasmeijer, Peter Achten, Pieter W. M. Koopm...
132
Voted
FPGA
1995
ACM
118views FPGA» more  FPGA 1995»
15 years 7 months ago
An SBus Monitor Board
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
H. A. Xie, Kevin E. Forward, K. M. Adams, D. Leask