Sciweavers

287 search results - page 10 / 58
» On the Complexity of Register Coalescing
Sort
View
IPPS
2007
IEEE
15 years 8 months ago
Microarchitectural Support for Speculative Register Renaming
This paper proposes and evaluates a new microarchitecture for out-of-order processors that supports speculative renaming. We call speculative renaming to the speculative omission ...
Jesús Alastruey, Teresa Monreal, Víc...
IEEEPACT
2003
IEEE
15 years 7 months ago
Reducing Datapath Energy through the Isolation of Short-Lived Operands
We present a technique for reducing the power dissipation in the course of writebacks and committments in a datapath that uses a dedicated architectural register file (ARF) to hol...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...
IEEECIT
2010
IEEE
15 years 7 days ago
Parallel Best Neighborhood Matching Algorithm Implementation on GPU Platform
—Error concealment restores the visual integrity of image content that has been damaged due to a bad network transmission. Best neighborhood matching (BNM) is an effective image ...
Guangyong Zhang, Liqiang He, Yanyan Zhang
PLDI
2005
ACM
15 years 7 months ago
Register allocation for software pipelined multi-dimensional loops
Software pipelining of a multi-dimensional loop is an important optimization that overlaps the execution of successive outermost loop iterations to explore instruction-level paral...
Hongbo Rong, Alban Douillet, Guang R. Gao
FOSSACS
2008
Springer
15 years 3 months ago
Model Checking Freeze LTL over One-Counter Automata
We study complexity issues related to the model-checking problem for LTL with registers (a.k.a. freeze LTL) over one-counter automata. We consider several classes of one-counter au...
Stéphane Demri, Ranko Lazic, Arnaud Sangnie...